From f58597e68f36da7d4f4dec08520d3e12258addf2 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Fri, 17 Sep 2010 13:48:41 +0200 Subject: [PATCH 01/69] ARM: s3c24xx: Set ARCH_NR_GPIOS according to the selected SoC types. Currently the code in gpiolib.c tries to register GPIO BANKA-BANKM. ARCH_NR_GPIOS on the other hand is set only to 256, which would be the equivalent of BANKA-BANKH. Thus the registration of all other banks will fail. This patch fixes this by setting S3C_GPIO_END according to the selected SoC types. S3C_GPIO_END is set to the maximum of the number of GPIOs over all selected SoC types. Thus it is ensured that memory is not wasted if support for SoCs with higher GPIO numbers is not built-in. When registering the bank it is made sure that banks which are outside of that range are not even tried to be registered. Otherwise there would be problems with configs where CONFIG_S3C24XX_GPIO_EXTRA is set to a non zero value. Signed-off-by: Lars-Peter Clausen --- arch/arm/mach-s3c2410/include/mach/gpio.h | 30 +++++++++++----------------- arch/arm/plat-s3c24xx/gpiolib.c | 2 + 2 files changed, 14 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-s3c2410/include/mach/gpio.h b/arch/arm/mach-s3c2410/include/mach/gpio.h index f7f6b07..f9ddfa9 100644 --- a/arch/arm/mach-s3c2410/include/mach/gpio.h +++ b/arch/arm/mach-s3c2410/include/mach/gpio.h @@ -16,26 +16,20 @@ #define gpio_cansleep __gpio_cansleep #define gpio_to_irq __gpio_to_irq -/* some boards require extra gpio capacity to support external - * devices that need GPIO. - */ +#include +#include -#ifdef CONFIG_CPU_S3C244X -#define ARCH_NR_GPIOS (32 * 9 + CONFIG_S3C24XX_GPIO_EXTRA) -#elif defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416) -#define ARCH_NR_GPIOS (32 * 12 + CONFIG_S3C24XX_GPIO_EXTRA) +#if defined(CPU_S3C2416) || defined(CPU_S3C2443) +#define S3C_GPIO_END S3C2410_GPM(S3C2410_GPIO_M_NR) +#elif defined(CONFIG_CPU_S3C244X) +#define S3C_GPIO_END S3C2410_GPJ(S3C2410_GPIO_J_NR) #else -#define ARCH_NR_GPIOS (256 + CONFIG_S3C24XX_GPIO_EXTRA) +#define S3C_GPIO_END S3C2410_GPH(S3C2410_GPIO_H_NR) #endif -#include -#include -#include +/* some boards require extra gpio capacity to support external + * devices that need GPIO. + */ +#define ARCH_NR_GPIOS (S3C_GPIO_END + CONFIG_S3C24XX_GPIO_EXTRA) -#ifdef CONFIG_CPU_S3C244X -#define S3C_GPIO_END (S3C2410_GPJ(0) + 32) -#elif defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416) -#define S3C_GPIO_END (S3C2410_GPM(0) + 32) -#else -#define S3C_GPIO_END (S3C2410_GPH(0) + 32) -#endif +#include diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c index 243b641..72fa584 100644 --- a/arch/arm/plat-s3c24xx/gpiolib.c +++ b/arch/arm/plat-s3c24xx/gpiolib.c @@ -217,6 +217,8 @@ static __init int s3c24xx_gpiolib_init(void) int gpn; for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++) { + if (chip->chip.base >= S3C_GPIO_END) + break; if (!chip->config) chip->config = &s3c24xx_gpiocfg_default; -- 1.7.2.5